Synchronous language elements are added to Modelica as an alternative to normal when-clauses to making modeling of complex sampled systems safer and easier.
In this example dc.xd and dc.ud are Clocked variables, and only defined when the Clock is active (every 3rd second). At time instants where the associated clock is not active, the value of a clocked variable can be inquired by using an explicit cast operator, e.g., hold.// Discrete controller when Clock() then E*dc.xd=A*previous(dc.xd)+B*dc.yd; dc.ud=C*previous(dc.xd)+D*dc.yd; end when; // hold controller output: plant.u=hold(dc.ud); // Plant 0=f(der(plant.x),plant.x,plant.u); plant.y=g(plant.x); // Sample continuous signal dc.yd=sample(plant.y, Clock(3));