LogicToRealLogic to Real converter  | 
     | 
This information is part of the Modelica Standard Library maintained by the Modelica Association.
Conversion of a digital input into a Real output without any delay according to:
input output 'U' (coded by 1) val_U 'X' (coded by 2) val_X '0' (coded by 3) val_0 '1' (coded by 4) val_1 'Z' (coded by 5) val_Z 'W' (coded by 6) val_W 'L' (coded by 7) val_L 'H' (coded by 8) val_H '-' (coded by 9) val_m
The values val... are given by parameters.
If the signal width is greater than 1 this conversion is done for each signal.
| n | 
         Value: Type: Integer Description: signal width  | 
    
|---|---|
| value_U | 
         Value: Type: Real Description: value for digital U (uninitialized)  | 
    
| value_X | 
         Value: Type: Real Description: value for digital X (Forcing Unknown)  | 
    
| value_0 | 
         Value: Type: Real Description: value for digital 0 (Forcing 0)  | 
    
| value_1 | 
         Value: Type: Real Description: value for digital 1 (Forcing 1)  | 
    
| value_Z | 
         Value: Type: Real Description: value for digital Z (High Impedance)  | 
    
| value_W | 
         Value: Type: Real Description: value for digital W (Weak Unknown)  | 
    
| value_L | 
         Value: Type: Real Description: value for digital L (Weak 0)  | 
    
| value_H | 
         Value: Type: Real Description: value for digital H (Weak 1)  | 
    
| value_m | 
         Value: Type: Real Description: value for digital m (Do not care)  | 
    
| x | 
         Type: DigitalInput[n]  | 
    |
|---|---|---|
| y | 
         Type: RealOutput[n]  |