ComputationalDelayDelay a clocked signal for at most one period, in order to model a computational delay |
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Information
This information is part of the Modelica Standard Library maintained by the Modelica Association.
This block delays a clocked Real input signal by the fraction shiftCounter/resolution of the last interval. There is the restriction that shiftCounter/resolution ≤ 1.
Parameters (2)
| shiftCounter |
Value: 0 Type: Integer Description: (min=0, max=resolution), computational delay = interval()*shiftCounter/resolution |
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| resolution |
Value: 1 Type: Integer Description: Time quantization resolution of sample interval |
Connectors (2)
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u |
Type: RealInput Description: Connector of clocked, Real input signal |
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y |
Type: RealOutput Description: Connector of clocked, Real output signal |
Used in Components (1)
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Modelica.Clocked.RealSignals.Sampler Hold with (simulated) Digital-Analog converter effects and computational delay |