Package Contents

	Multiplexer 4 to 1 Bit Multiplexer Example
	FlipFlop Pulse Triggered Master Slave Flip-Flop
	HalfAdder Adding circuit for binary numbers without input carry bit
	FullAdder Full 1 Bit Adder Example
	Adder4 4 Bit Adder Example
	Counter3 3 Bit Counter Example
	Counter Generic N Bit Counter Example
	VectorDelay Vector delay
	DFFREG Pulse triggered D-Register-Bank, high active reset
	DFFREGL Pulse triggered D-Register-Bank, low active reset
	DFFREGSRH Pulse triggered D-Register-Bank, high active set and reset
	DFFREGSRL Pulse triggered D-Register-Bank, low active set and reset
	DLATREG Level sensitive D-Register-Bank, high active reset
	DLATREGL Level sensitive D-Register-Bank, low active reset
	DLATREGSRH Level sensitive D-Register-Bank, high active set and reset
	DLATREGSRL Level sensitive D-Register-Bank, low active set and reset
	NXFER Functionality test of NXFERGATE
	NRXFER Functionality test of NRXFERGATE
	BUF3S Functionality test of BUF3S
	INV3S Functionality test of INV3S
	WiredX Functionality test of WiredX
	MUX2x1 Simple Multiplexer test
	RAM Simple RAM test example
	Utilities Utility components used by package Examples

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