NRXFERGATETransfergate with enable active high. Output strength reduced. |
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Information
This information is part of the Modelica Standard Library maintained by the Modelica Association.
Description in VHDL is given by http://www.cs.sfu.ca/~ggbaker/reference/std_logic/src/std_logic_entities.vhd
Truth Table
| DataIn | Enable | DataOut |
| * | U | U |
| * | X | UW |
| * | 0 | Z |
| * | 1 | DataIn, Strength Reduced |
| * | Z | UW |
| * | W | UW |
| * | L | Z |
| * | H | DataIn, Strength Reduced |
| * | - | UW |
UW: if dataIn == U then U else W Strength Reduced: 0 -> L, 1 -> H, X -> W
Parameters (2)
Connectors (3)
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enable |
Type: DigitalInput |
|---|---|---|
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x |
Type: DigitalInput |
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y |
Type: DigitalOutput |
Components (1)
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inertialDelaySensitive |
Type: InertialDelaySensitive |
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Used in Examples (1)
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Modelica.Electrical.Digital.Examples Functionality test of NRXFERGATE |