This package contains examples that demonstrate the usage of the components of the Electrical.Analog library.
The examples are simple to understand. They will show a typical behavior of the components, and they will give hints to users.
Extends from Modelica.Icons.ExamplesPackage (Icon for packages containing runnable examples).
| Name | Description |
|---|---|
AD_DA_conversion | Conversion circuit |
AmplifierWithOpAmpDetailed | Simple Amplifier circuit which uses OpAmpDetailed |
CauerLowPassAnalog | Cauer low pass filter with analog components |
CauerLowPassOPV | Cauer low pass filter with operational amplifiers |
CauerLowPassSC | Cauer low-pass filter with operational amplifiers and switched capacitors |
CharacteristicIdealDiodes | Characteristic of ideal diodes |
CharacteristicThyristors | Characteristic of ideal thyristors |
ChuaCircuit | Chua's circuit, ns, V, A |
CompareTransformers | Transformer circuit to show the magnetization facilities |
ControlledSwitchWithArc | Comparison of controlled switch models both with and without arc |
DifferenceAmplifier | Simple NPN transistor amplifier circuit |
GenerationOfFMUs | Example to demonstrate variants to generate FMUs (Functional Mock-up Units) |
HeatingMOSInverter | Heating MOS Inverter |
HeatingNPN_OrGate | Heating NPN Or Gate |
HeatingPNP_NORGate | Heating PNP NOR Gate |
HeatingRectifier | Heating rectifier |
HeatingResistor | Heating resistor |
IdealTriacCircuit | Ideal triac test circuit |
InvertingAmp | Inverting amplifier |
NandGate | CMOS NAND Gate (see Tietze/Schenk, page 157) |
OpAmps … | Examples with operational amplifiers |
OvervoltageProtection | Example for Zener diodes |
Rectifier | B6 diode bridge |
ResonanceCircuits | Resonance circuits: example to demonstrate generation of FMUs (Functional Mock-up Units) |
ShowSaturatingInductor | Simple demo to show behaviour of SaturatingInductor component |
ShowVariableResistor | Simple demo of a VariableResistor model |
SimpleTriacCircuit | Simple triac test circuit |
SwitchWithArc | Comparison of switch models both with and without arc |
ThyristorBehaviourTest | Thyristor demonstration example |
Utilities … | Utility components used by package Examples |
The example Cauer Filter is a low-pass-filter of the fifth order. It is realized using an analog network. The voltage source V is the input voltage (step), and the R2.p.v is the filter output voltage. The pulse response is calculated.
The simulation end time should be 60. Please plot both V.p.v (input voltage) and R2.p.v (output voltage).
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Inductance | l1 | 1.304 | filter coefficient I1 |
Inductance | l2 | 0.8586 | filter coefficient I2 |
Capacitance | c1 | 1.072 | filter coefficient c1 |
Capacitance | c2 | (2.906997720064 * l1) ^ (-1) | filter coefficient c2 |
Capacitance | c3 | 1.682 | filter coefficient c3 |
Capacitance | c4 | (1.392270203025 * l2) ^ (-1) | filter coefficient c4 |
Capacitance | c5 | 0.7262 | filter coefficient c5 |
The example Cauer Filter is a low-pass-filter of the fifth order. It is realized using an analog network with operational amplifiers. The voltage source V is the input voltage (step), and the OP5.out.v is the filter output voltage. The pulse response is calculated.
This model is identical to the CauerLowPassAnalog example, but inverting. To get the same response as that of the CauerLowPassAnalog example, a negative voltage step is used as input.
The simulation end time should be 60. Please plot both V.v (which is the inverted input voltage) and OP5.p.v (output voltage). Compare this result with the CauerLowPassAnalog result.
During translation some warnings are issued concerning resistor values (Value=-1 not in range [0,1e100]). Do not worry about it. The negative values are o.k.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Capacitance | l1 | 1.304 | filter coefficient i1 |
Capacitance | l2 | 0.8586 | filter coefficient i2 |
Capacitance | c1 | 1.072 | filter coefficient c1 |
Capacitance | c2 | (2.906997720064 * l1) ^ (-1) | filter coefficient c2 |
Capacitance | c3 | 1.682 | filter coefficient c3 |
Capacitance | c4 | (1.392270203025 * l2) ^ (-1) | filter coefficient c4 |
Capacitance | c5 | 0.7262 | filter coefficient c5 |
The example CauerLowPassSC is a low-pass-filter of the fifth order. It is realized using an switched-capacitor network with operational amplifiers. The voltage source V is the input voltage (step), and the OP5.out.v is the filter output voltage. The pulse response is calculated.
This model is identical to the CauerLowPassAnalog example, but inverting. To get the same response as that of the CauerLowPassAnalog example, a negative voltage step is used as input.
This model is identical to the CauerLowPassOPV example. But the resistors are realized by switched capacitors (see SwitchedCapacitor). There are two different types of instances, one with a value of R=1 and one with a value of R=-1.
The simulation end time should be 60. Please plot both V.v (which is the inverted input voltage) and OP5.out.v (output voltage). Compare this result with the CauerLowPassAnalog result.
Due to the recharging of the capacitances after switching the performance of simulation is not as good as in the CauerLowPassOPV example.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Capacitance | l1 | 1.304 | filter coefficient i1 |
Capacitance | l2 | 0.8586 | filter coefficient i2 |
Capacitance | c1 | 1.072 | filter coefficient c1 |
Capacitance | c2 | (2.906997720064 * l1) ^ (-1) | filter coefficient c2 |
Capacitance | c3 | 1.682 | filter coefficient c3 |
Capacitance | c4 | (1.392270203025 * l2) ^ (-1) | filter coefficient c4 |
Capacitance | c5 | 0.7262 | filter coefficient c5 |
Three examples of ideal diodes are shown:
the totally ideal diode (Ideal) with all parameters to be zero,
the nearly ideal diode with Ron=0.1 and Goff=0.1
and the nearly ideal but displaced diode with Vknee=5 and Ron=0.1 and Goff=0.1.
The resistance and conductance are chosen untypically high since the slopes should be seen in the graphics.
Simulate until T=1 s. Plot in separate windows: Ideal.i versus Ideal.v, With_Ron_Goff.i versus With_Ron_Goff.v, With_Ron_Goff_Vknee.i versus With_Ron_Goff_Vknee.v
Extends from Modelica.Icons.Example (Icon for runnable examples).
This example compares the behavior of the ideal thyristor and the ideal GTO thyristor with Vknee=1 both. The thyristors IdealThyristor1 and IdealGTOThyristor1 are controlled by an unregular Boolean fire signal. The aim is to show several cases for the fire signal in combination with the state (s<0 or s>0)of the thyristors. Please simulate until 6 seconds and compare IdealThyristor1.v with IdealGTOThyristor1.v, the same with IdealThyristor1.s and IdealGTOThyristor1.s (attention: s is a protected variable in each thyristor). Also compare IdealThyristor1.off and IdealGTOThyristor1.off and have a look at the fire signal (e.g. IdealThyristor1.fire). It can be seen that the IdealGTOThyristor1 reacts on switching off the fire signal whereas the IdealThyristor1 does not show this behavior.
The other thyristors IdealThyristor2 and IdealGTOThyristor2 are controlled by an periodic Boolean fire signal to show a typical use case. Please compare IdealThyristor2.v with IdealGTOThyristor2.v
Extends from Modelica.Icons.Example (Icon for runnable examples).
Chua's circuit is the most simple nonlinear circuit which shows chaotic behaviour. The circuit consists of linear basic elements (capacitors, resistor, conductor, inductor), and one nonlinear element, which is called Chua's diode. The chaotic behaviour is simulated.
The simulation end time should be set to 5e4. To get the chaotic behaviour please plot C1.v. Choose C2.v as the independent variable .
Reference:
Kennedy, M.P.: Three Steps to Chaos - Part I: Evolution. IEEE Transactions on CAS I 40 (1993)10, 640-656
Extends from Modelica.Icons.Example (Icon for runnable examples).
It is a simple NPN transistor amplifier circuit. The voltage difference between R1.p and R3.n is amplified. The output signal is the voltage between R2.n and R4.n. In this example the voltage at V1 is amplified because R3.n is grounded.
The simulation end time should be set to 1e- 8. Please plot the input voltage V1.v, and the output voltages R2.n.v, and R4.n.v.
Reference:
Tietze, U.; Schenk, Ch.: Halbleiter-Schaltungstechnik. Springer-Verlag Berlin Heidelberg NewYork 1980, p. 59
Extends from Modelica.Icons.Example (Icon for runnable examples).
The heating MOS inverter shows a heat flow always if a transistor is leading.
Simulate until T=5 s. Plot in separate windows:
Sin.p.v and Capacitor1.p.v
HeatCapacitor1.port.T and H_PMOS.heatPort.T and H_NMOS.heatPort.T
H_PMOS.heatPort.Q_flow and H_NMOS.heatPort.Q_flow
Extends from Modelica.Icons.Example (Icon for runnable examples).
The heating "NPN or" gate shows a heat flow always if a transistor is leading.
Simulate until T=200 s. Plot in separate windows:
V1.v and V2.v and C2.v
HeatCapacitor1.port.T and T1.heatPort.T and T2.heatPort.T
T1.heatPort.Q_flow and T2.heatPort.Q_flow
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Capacitance | CapVal | 0 | |
Time | tauVal | 0 |
The heating "PNP NOR" gate shows a heat flow always if a transistor is conducting.
Simulate until T=200 s. Plot V1.v and V2.v and C2.v to see the NOR-functionality. High potential is -6V which means logic "true". Low potential is 0V which means logic "false".
To see which transistor is conducting one can have a look at the temperatures T1.heatPort.T and T2.heatPort.T and the heat flows T1.heatPort.Q_flow and T2.heatPort.Q_flow of the heatports of the transistors T1 and T2.
They are different from zero if the transistor is conducting.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Capacitance | CapVal | 0 | |
Time | tauVal | 0 |
This is a very simple circuit consisting of a voltage source and a resistor. The loss power in the resistor is transported to the environment via its heatPort.
Extends from Modelica.Icons.Example (Icon for runnable examples).
The heating rectifier shows a heat flow always if the electrical capacitor is loaded.
Simulate until T=5 s.Plot in separate windows:
SineVoltage1.v and Capacitor1.p.v
HeatCapacitor1.port.T and HeatingDiode1.heatPort.T
HeatingDiode1.heatPort.Q_flow
Extends from Modelica.Icons.Example (Icon for runnable examples).
The nand gate is a basic CMOS building block. It consists of four CMOS transistors. The output voltage Nand.y.v is low if and only if the two input voltages at Nand.x1.v and Nand.x2.v are both high. In this way the nand functionality is realized.
The simulation end time should be set to 1e-7. Please plot the input voltages Nand.x1.v, d Nand.x2.v, and the output voltage Nand.y.v.
Reference:
Tietze, U.; Schenk, Ch.: Halbleiter-Schaltungstechnik. Springer-Verlag Berlin Heidelberg NewYork 1980, p. 157
Extends from Modelica.Icons.Example (Icon for runnable examples).
This example is a simple circuit for overvoltage protection. If the voltage zDiode_1.n.v is too high, the Diode zDiode_2 breaks through and the voltage gets down.
The simulation end time should be set to 0.4. To get the typical behaviour please plot sineVoltage.p.v, RL.p.v, zDiode_2.n.v and zDiode_1.n.i.
Extends from Modelica.Icons.Example (Icon for runnable examples).
The rectifier example shows a B6 diode bridge fed by a three phase sinusoidal voltage, loaded by a DC current. DC capacitors start at ideal no-load voltage, thus making easier initial transient.
Simulate until T=0.1 s. Plot in separate windows:
uDC ... DC-voltage
iAC ... AC-currents 1..3
uAC ... AC-voltages 1..3 (distorted)
Try different load currents iDC = 0..approximately 500 A. You may watch losses (of the whole diode bridge) trying different diode parameters.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Voltage | VAC | 400 | RMS line-to-line |
Frequency | f | 50 | line frequency |
Inductance | LAC | 6e-5 | line inductor |
Resistance | Ron | 0.001 | diode forward resistance |
Conductance | Goff | 0.001 | diode backward conductance |
Voltage | Vknee | 2 | diode threshold voltage |
Capacitance | CDC | 0.015 | DC capacitance |
Current | IDC | 500 | load current |
This simple circuit uses the saturating inductor which has a changing inductivity.
This circuit should be simulated until 1 s. Compare SaturatingInductance1.p.i with Inductance1.p.i to see the difference between saturating and ideal inductor.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Inductance | Lzer | 2 | Inductance near current=0 |
Inductance | Lnom | 1 | Nominal inductance at Nominal current |
Current | Inom | 1 | Nominal current |
Inductance | Linf | 0.5 | Inductance at large currents |
Voltage | U | 1.25 | Source voltage (peak) |
Frequency | f | (2 * Modelica.Constants.pi) ^ (-1) | Source frequency |
Angle | phase | 0.5 * Modelica.Constants.pi | Source voltage phase shift |
It is a simple test circuit for the VariableResistor. The VariableResistor should be compared with R2.
Simulate until T=1 s.
Extends from Modelica.Icons.Example (Icon for runnable examples).
This example is to compare the behaviour of switch models with and without an electric arc taking into consideration.
switch1.i and switch2.iThe difference in the closing area shows that the simple arc model avoids the suddenly switching.
Extends from Modelica.Icons.Example (Icon for runnable examples).
This is a simple test circuit, to test the behavior of the thyristor model.
Interesting values to plot are Cathode.v, Gate.v and sineVoltage.p.v. and in another plot window pulseCurrent.p.i
The simulation time should be from 0 seconds to 2e-4 seconds.
Extends from Modelica.Icons.Example (Icon for runnable examples).
With the test circuit AmplifierWithOpAmpDetailed a time domain analysis of the example arrangement with a sinusoidal input voltage (12 V amplitude, frequency 1 kHz) using the operational amplifier model OpAmpDetailed is carried out. The working voltages are 15 V and -15 V.
Extends from Modelica.Icons.Example (Icon for runnable examples).
This example is to demonstrate the behaviour of transformer models. The Basic.Transformer, which consists of mutual coupled inductors, is compared with the ideal transformer model. If the ideal model is used with considerMagnetization=true leakage inductances are taken into account, otherwise not. The example is constructed in such a way that the ideal transformer circuit with considerMagnetization=true shows the same behaviour as the basic transformer.
Simulate until T=50 s with both considerMagnetization=false and considerMagnetization=true of the ideal transformer.
Plot in separate windows for comparison:
basicTransformer.p1.v and idealTransformer.p1.v
basicTransformer.p1.i and idealTransformer.p1.i
basicTransformer.p2.v and idealTransformer.p2.v
basicTransformer.p2.i and idealTransformer.p2.i
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Voltage | Vdc | 0.1 | DC offset of voltage source |
Voltage | Vpeak | 0.1 | Peak voltage of voltage source |
Frequency | f | 10 | Frequency of voltage source |
Angle | phi0 | 0.5 * pi | Phase of voltage source |
Real | n | 2 | Turns ratio primary:secondary voltage |
Resistance | R1 | 0.01 | Primary resistance w.r.t. primary side |
Inductance | L1sigma | 0.05 / (2 * pi * f) | Primary leakage inductance w.r.t. primary side |
Inductance | Lm1 | 10 / (2 * pi * f) | Magnetizing inductance w.r.t. primary side |
Inductance | L2sigma | 0.05 / (2 * pi * f) / n ^ 2 | Secondary leakage inductance w.r.t. secondary side |
Resistance | R2 | 0.01 / n ^ 2 | Secondary resistance w.r.t. secondary side |
Resistance | RL | (n ^ 2) ^ (-1) | Load resistance |
final Inductance | L1 | L1sigma + M * n | Primary no-load inductance |
final Inductance | L2 | L2sigma + M / n | Secondary no-load inductance |
final Inductance | M | Lm1 / n | Mutual inductance |
This example is to compare the behaviour of switch models with and without an electric arc taking into consideration.
switch1.i and switch2.iThe difference in the closing area shows that the simple arc model avoids the suddenly switching.
Extends from Modelica.Icons.Example (Icon for runnable examples).
The simple TRIAC example shows how the SimpleTriac is used within an alternating current circuit.
The TRIAC is not conducting until the Gate input g becomes positive. Then it becomes "conducting". If the TRIAC voltage changes its direction, the TRIAC becomes blocking. Due to the antiparallel connection of the internal two thyristors the same behavior is repeated in the negative half-wave.
Simulate until 0.001 seconds. Display V.p.v (input voltage), simpleTriac.g.i (gate input), and both simplelTriac.n.v and simpleTriac.n.i, which demonstrate the TRIAC behavior.
Extends from Modelica.Icons.Example (Icon for runnable examples).
The simple ideal TRIAC example shows how a triac is used within an alternating current circuit.
The TRIAC is not conducting until the Boolean input becomes true (internally coded by 1, therefore the input is called fire1). Then it becomes "conducting", the knee voltage is reached. If the TRIAC voltage falls below the knee voltage, the TRIAC becomes blocking. Due to the antiparallel connection of the internal two thyristors the same behavior is repeated in the negative half-wave.
Simulate until 2 seconds. Display V.p.v (input voltage), booleanPulse.y (fire1 input), and both idealTriac.n.v and idealTriac.n.i, which demonstrate the TRIAC behavior.
Extends from Modelica.Icons.Example (Icon for runnable examples).
The simple converter circuit converts an analog sine signal into a N-bit (by default a 4 bit) logic signal, which is converted backward into an analog signal.
Compare the input voltage (aD_Converter.p.v) with the output voltage (dA_Converter.p.v). By changing N the influence of the digital signal width can be studied. Otherwise the trigger frequency pulse.period can be changed to see its influence.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Integer | N | 7 | Digital signal width |
This example demonstrates how to generate an input/output block (e.g. in form of an FMU - Functional Mock-up Unit) from various Electrical components. The goal is to export such an input/output block from Modelica and import it in another modeling environment. The essential issue is that before exporting it must be known in which way the component is utilized in the target environment. Depending on the target usage, different connector variables need to be in the interface with either input or output causality. Note, this example model can be used to test the FMU export/import of a Modelica tool. Just export the components marked in the icons as "toFMU" as FMUs and import them back. The models should then still work and give the same results as a pure Modelica model.
Connecting two capacitors
The first part (DirectCapacitor, InverseCapacitor)
demonstrates how to export two capacitors and connect them
together in a target system. This requires that one of the capacitors
(here: DirectCapacitor)
is defined to have states and the voltage and
derivative of voltage are provided in the interface.
The other capacitor (here: InverseCapacitor) requires current according
to the provided input voltage and derivative of voltage.
Connecting a resistance element between two capacitors
The second part (Resistor2) demonstrates how to export a resistance element
that needs only voltages for its resistance law and connect this
resistance law in a target system between two capacitors.
Connecting two inductors
The third part (DirectInductor, InverseInductor)
demonstrates how to export two inductors and connect them
together in a target system. This requires that one of the inductors
(here: DirectInductor)
is defined to have states and the current and
derivative of current are provided in the interface.
The other inductor (here: InverseInductor) requires voltage according
to the provided input current and derivative of current.
Connecting a conductance element between two inductors
The fourth part (Conductor4) demonstrates how to export a conductance element
that needs only currents for its conductance law and connect this
conductance law in a target system between two inductors.
Bear in mind that separating physical components and connecting them via adaptor signals requires to place appropriate ground components to define electric potential within the subcircuits.
Extends from Modelica.Icons.Example (Icon for runnable examples).
This example demonstrates how to couple the components of a parallel resonance circuit (upper part) and a series resonance circuit (lower part) not directly but using adaptors between physical connectors and input/output signals. Taking into account which derivatives are required, these components can be exported as input/output blocks (e.g. in form of an FMU - Functional Mock-up Unit). Connecting these input/output blocks should give the same results as connecting the physical components directly.
Bear in mind that separating physical components and connecting them via adaptor signals requires to place appropriate ground components to define electric potential within the subcircuits.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Capacitance | C | 0.01 | Capacitance |
Inductance | L | 0.01 | Inductance |
final Frequency | fRes | (2 * pi * sqrt(L * C)) ^ (-1) | Source frequency |
Real | res | 1 | f/fResonanace |
Frequency | f | res * fRes | Source frequency |
This is an inverting amplifier. Resistance R1 can be chosen, R2 is defined by the desired amplification k.
Extends from Modelica.Icons.Example (Icon for runnable examples).
| Type | Name | Default | Description |
|---|---|---|---|
Voltage | Vps | 15 | Positive supply |
Voltage | Vns | -15 | Negative supply |
Voltage | Vin | 5 | Amplitude of input voltage |
Frequency | f | 10 | Frequency of input voltage |
Real | k | 2 | Desired amplification |
Resistance | R1 | 1000 | Arbitrary resistance |
Resistance | R2 | k * R1 | Calculated resistance to reach desired amplification k |
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