PartialClockedSISO

Block with clocked single input and clocked single output Real signals

Connectors (2)

u

Type: RealInput

Description: Connector of clocked, Real input signal

y

Type: RealOutput

Description: Connector of clocked, Real output signal

Extended by (11)

PartialNoise

Modelica.Clocked.RealSignals.Interfaces

Interface for SISO blocks with Real signals that add noise to the signal

FIRbyCoefficients

Modelica.Clocked.RealSignals.Periodic

FIR filter defined by coefficients

MovingAverage

Modelica.Clocked.RealSignals.Periodic

Moving average filter (= FIR filter with coefficients a = fill(1/n,n), but implemented recursively)

PI

Modelica.Clocked.RealSignals.Periodic

Discrete-time PI controller

TransferFunction

Modelica.Clocked.RealSignals.Periodic

Discrete-time Transfer Function block

FractionalDelay

Modelica.Clocked.RealSignals.NonPeriodic

Delay the clocked input signal for a fractional multiple of the sample period

UnitDelay

Modelica.Clocked.RealSignals.NonPeriodic

Delay the clocked input signal for one sample period

PI

Modelica.Clocked.RealSignals.NonPeriodic

Discrete-time PI controller with clocked input and output signals (for periodic and aperiodic systems using the parameterization of the continuous PI controller)

Limiter

Modelica.Clocked.RealSignals.Sampler.Utilities.Internal

Limit the range of a signal

Quantization

Modelica.Clocked.RealSignals.Sampler.Utilities.Internal

DAC quantization effects

ComputationalDelay

Modelica.Clocked.RealSignals.Sampler.Utilities.Internal

Delay a clocked signal for at most one period, in order to model a computational delay