RS

Unclocked RS FlipFlop

Diagram

Information

This information is part of the Modelica Standard Library maintained by the Modelica Association.

RS is a basic component for e.g., the RS (set-reset) flipflop, which is built up by Nor gates according to the schematic. To avoid a numerical loop a small transport delay is inserted which delay time is a parameter of the RS component. Also its initial value can be set by parameter.

Parameters (2)

delayTime

Value: 0

Type: Time (s)

Description: Delay time

q0

Value: L.'U'

Type: Logic

Description: Initial value of output

Connectors (4)

s

Type: DigitalInput

r

Type: DigitalInput

q

Type: DigitalOutput

qn

Type: DigitalOutput

Components (3)

Nor1

Type: Nor

Nor2

Type: Nor

TD1

Type: TransportDelay

Used in Components (2)

RSFF

Modelica.Electrical.Digital.Examples.Utilities

Unclocked RS FlipFlop

JKFF

Modelica.Electrical.Digital.Examples.Utilities

JK FlipFlop